Add figures and stuff
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@ -13,6 +13,8 @@
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\usepackage{listings}
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\usepackage{subcaption}
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\usepackage{bbm}
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\usepackage{siunitx}
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\usepackage[export]{adjustbox}
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%
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@ -26,15 +28,6 @@
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\pgfplotsset{colorscheme/cel}
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\input{common.tex}
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\newcommand{\lineintext}[1]{%
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\begin{tikzpicture}
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\draw[#1] (0,0) -- (1.5em,0);
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% Dummy node taking up the space of a letter to fix spacing
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\node[outer sep=0, inner sep=0] () at (0.75em,0) {\phantom{a}};
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\end{tikzpicture}%
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}
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%
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%
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@ -106,7 +99,7 @@ in D-Band}
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\setnextsection{0}
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\input{sections/01_background_and_intro.tex}
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%\input{sections/01_background_and_intro.tex}
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\input{sections/02_proposed_ideas.tex}
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\input{sections/03_simulation_results.tex}
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\input{sections/04_discussion.tex}
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res/paper/table1.pdf
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res/simulation/Buffer.pdf
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res/simulation/INT_SQuad_TIA_01.pdf
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res/simulation/INT_SQuad_TIA_02.pdf
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res/simulation/INT_SQuad_TIA_03.pdf
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res/simulation/SQuad_OP_01.pdf
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res/simulation/TIA_OP_01.pdf
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res/simulation/schematic.pdf
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@ -3,10 +3,11 @@
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\label{sec:Background and Introduction}
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\begin{frame}
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\frametitle{Theoretical background}
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\frametitle{Theoretical Background}
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\begin{itemize}
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\item [TODO] Relevant theoretical background on mixers
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\item [TODO] What is special about broadband mixers/devices?
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\item [TODO] What is special about zero-IF mixers?
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\item [TODO] What is special about down-conversion mixers?
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\item [TODO] What is special about BiCMOS technology?
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@ -2,70 +2,170 @@
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\section{Proposed Ideas}
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\label{sec:Proposed Ideas}
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% \begin{frame}[t]
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% \frametitle{Overview of Proposed Design}
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%
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% \vspace*{-5mm}
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%
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% \begin{itemize}
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% \item Paper by Maiwald, \emph{et al}. \citereference{Mai+21}
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% \end{itemize}
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%
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% \begin{figure}[h]
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% \centering
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%
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% \begin{subfigure}{0.33\textwidth}
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% \centering
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%
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% \fbox{\includegraphics[page=1,width=.6\textwidth]{res/paper/mixer_paper}}
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% \end{subfigure}%
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% \begin{subfigure}{0.33\textwidth}
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% \centering
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%
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% \fbox{\includegraphics[page=2,width=.6\textwidth]{res/paper/mixer_paper}}
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% \end{subfigure}%
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% \begin{subfigure}{0.33\textwidth}
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% \centering
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%
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% \fbox{\includegraphics[page=4,width=.6\textwidth]{res/paper/mixer_paper}}
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% \end{subfigure}%
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% \end{figure}
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%
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% \begin{itemize}
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% \item Spec 1
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% \item Spec 2
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% \item Spec 3
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% \end{itemize}
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%
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% \bigskip
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%
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% \addreference{Mai+21}{T. Maiwald et al., "A Broadband Zero-IF Down-Conversion Mixer in 130 nm SiGe BiCMOS for Beyond 5G Communication Systems in D-Band," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 68, no. 7, pp. 2277-2281, July 2021}
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% \end{frame}
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\begin{frame}[t]
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\frametitle{Overview of Proposed Design}
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\vspace*{-5mm}
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\vspace*{-7mm}
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\begin{itemize}
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\item Paper by Maiwald, \emph{et al}. \citereference{Mai21}
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\item Paper by Maiwald, \emph{et al}. \citereference{Mai+21}
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\end{itemize}
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\vspace*{1mm}
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\begin{figure}[h]
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\centering
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\begin{subfigure}{0.33\textwidth}
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\begin{subfigure}[c]{0.33\textwidth}
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\centering
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\fbox{\includegraphics[page=1,width=.6\textwidth]{res/mixer_paper}}
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\fbox{\includegraphics[page=1,width=.6\textwidth]{res/paper/mixer_paper}}
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\end{subfigure}%
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\begin{subfigure}{0.33\textwidth}
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\begin{subfigure}[c]{0.33\textwidth}
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\centering
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\fbox{\includegraphics[page=2,width=.6\textwidth]{res/mixer_paper}}
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\end{subfigure}%
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\begin{subfigure}{0.33\textwidth}
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\centering
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\fbox{\includegraphics[page=4,width=.6\textwidth]{res/mixer_paper}}
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\includegraphics[width=\textwidth]{res/paper/figure1}
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\end{subfigure}%
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\end{figure}
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\vspace*{1mm}
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\begin{itemize}
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\item Spec 1
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\item Spec 2
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\item Spec 3
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\item High bandwidth, low power consumption, small size
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\item Applicable to electronic beam stearing for mm-Wave
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\item SiGe BiCMOS technology (B11HFC) from Infineon Technologies AG with $f_\text{t}/f_\text{max}$ of $250/\SI{370}{\giga\hertz}$
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\end{itemize}
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\bigskip
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\vspace*{2mm}
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\addreference{Mai+21}{T. Maiwald et al., ``A Broadband Zero-IF Down-Conversion Mixer in 130 nm SiGe BiCMOS for Beyond 5G Communication Systems in D-Band'', in \emph{IEEE Transactions on Circuits and Systems II: Express Briefs}, vol. 68, no. 7, pp. 2277-2281, July 2021}
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\end{frame}
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\addreference{Mai21}{T. Maiwald et al., "A Broadband Zero-IF Down-Conversion Mixer in 130 nm SiGe BiCMOS for Beyond 5G Communication Systems in D-Band," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 68, no. 7, pp. 2277-2281, July 2021}
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%\begin{frame}
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% \frametitle{Semiconductor Technology}
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%
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% \begin{itemize}
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% \item [TODO] (Maybe move to paper overview slide)
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% \item [TODO] "130 nm SiGe BiCMOS technology with a ft/fmax
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% of 250/370 GHz from Infineon Technologies AG." (SG13G2) vs
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% "SiGe BiCMOS process technology from IHP Microelectronics
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% with fmax of 500 GHz" (B11HFC)
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% -> Same kind of technology, different manufacturerer and fmax
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% \end{itemize}
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%\end{frame}
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\begin{frame}[fragile]
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\frametitle{Proposed Design: Mixer Core Cell}
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\begin{minipage}{.5\textwidth}
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\begin{itemize}
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\item Usage of switching quad (SQuad) instead of conventional Gilbert cell for more voltage headroom
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\item Mixer loaded by modified Cherry-Hooper \citereference{CH63} transimpedance amplifier (TIA)
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\item Transmission-line based differential L-type matching networks for high bandwidth
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\item Signal fed using marchand baluns for high bandwidth
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\end{itemize}
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\end{minipage}%
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\begin{minipage}{.5\textwidth}
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\centering
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\vspace*{-2mm}
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\begin{figure}[H]
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\centering
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\includegraphics[width=0.96\textwidth]{res/paper/figure6}
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\end{figure}
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\end{minipage}%
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\vspace{3mm}
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\addreference{CH63}{E.M. Cherry and D.E. Hooper, ``The design of wide-band transistor feedback amplifiers'', \emph{Proceedings of the Institution of Electrical Engineers}, vol. 110, pp. 375-389, February 1963}
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\end{frame}
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\begin{frame}[fragile]
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\frametitle{Proposed Design: IF Buffer}
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\vspace*{5.775mm}
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\begin{minipage}{.5\textwidth}
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\begin{itemize}
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\item Three-stages: two differential amplifier stages and an emitter follower
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\item Includes differential to single-ended conversion enabling dense chip-to-package transition
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\item Inductive peaking for bandwidth enhancement
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\end{itemize}
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\end{minipage}%
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\begin{minipage}{.5\textwidth}
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\centering
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\begin{figure}[H]
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\centering
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\includegraphics[width=0.96\textwidth]{res/paper/figure7}
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\end{figure}
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\end{minipage}%
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\end{frame}
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\begin{frame}
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\frametitle{Semiconductor Technology}
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\frametitle{Simulation and Measurement Results}
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\begin{itemize}
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\item [TODO] (Remove if not enough info provided in paper)
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\item [TODO] Comparison with IHP Technology
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\end{itemize}
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\end{frame}
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\begin{frame}
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\frametitle{Proposed Design}
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\begin{itemize}
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\item [TODO] Circuit schematics from paper
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\item [TODO] Explanation of which topology is used an why
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\item [TODO] Is there anything unconventional about the design?
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\end{itemize}
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\end{frame}
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\begin{frame}
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\frametitle{Results from Proposed Design}
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\begin{itemize}
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\item [TODO] Simulation results
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\item [TODO] Measurement results
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\end{itemize}
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\begin{minipage}{.5\textwidth}
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\vspace*{-2mm}
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\begin{figure}[H]
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\centering
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\includegraphics[width=0.9\textwidth]{res/paper/figure9}
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\end{figure}
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\vspace*{-3mm}
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\begin{figure}[H]
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\centering
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\hspace*{-7mm}
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\includegraphics[width=0.9\textwidth]{res/paper/figure11}
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\end{figure}
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\end{minipage}%
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\begin{minipage}{.5\textwidth}
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\vspace*{-2mm}
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\begin{figure}[H]
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\centering
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\includegraphics[width=0.9\textwidth]{res/paper/figure10}
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\end{figure}
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\vspace*{-3mm}
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\begin{figure}[H]
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\centering
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\hspace*{-4mm}
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\includegraphics[width=0.9\textwidth]{res/paper/figure12}
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\end{figure}
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\end{minipage}
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\end{frame}
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@ -1,42 +1,217 @@
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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\section{Simulation Results}
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\label{sec:Simulation Results}
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\section{Own Simulations}
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\label{sec:Own Simulation}
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\begin{frame}
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\frametitle{Simulation Setup}
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\frametitle{Design Steps}
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\begin{enumerate}
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\item Determination of operating point of individual stages
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\begin{itemize}
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\item SQuad
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\item TIA
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\item Buffer
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\end{itemize}
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\item Integration
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\begin{itemize}
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\item SQuad \& TIA
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\item SQuad, TIA \& Buffer
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\end{itemize}
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\item Matching of input and output
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\item Replacement of remaining DC blocks/feeds in bias circuitry
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\item Final optimization
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\end{enumerate}
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\end{frame}
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\begin{frame}
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\frametitle{Operating Point: Switching Quad}
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\begin{minipage}{0.5\textwidth}
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\begin{itemize}
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\item Operation
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\begin{itemize}
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\item Responsible for actual mixing
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\item Multiplication of RF-signal with square wave $\rightarrow$ generation of mixing products at IF-frequency and harmonics
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\end{itemize}
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\end{itemize}
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\bigskip
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\begin{itemize}
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\item Determination of operating point
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\begin{itemize}
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\item Exact value of $V_\text{CE}$ not crucial
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\item $V_\text{BE}$: Examination of $s_\text{21}$
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of Large-signal s-parameter simulation and noise figure (analogous to \citereference{Mai+21})
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\item [TODO] (Simulate noise figure or remove text)
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\end{itemize}
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\end{itemize}
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\end{minipage}%
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\begin{minipage}{0.5\textwidth}
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\centering
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\begin{figure}[H]
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\vspace*{-5mm}
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\hspace*{15mm}%
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\includegraphics[width=0.83\textwidth]{res/simulation/SQuad_OP_01.pdf}
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\vspace*{-18mm}
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\hspace*{-55mm}%
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\includegraphics[width=0.4\textwidth]{res/simulation/SQuad_OP_02.pdf}
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\end{figure}
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\end{minipage}
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\vspace{4mm}
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\addreference{Mai+21}{T. Maiwald et al., ``A Broadband Zero-IF Down-Conversion Mixer in 130 nm SiGe BiCMOS for Beyond 5G Communication Systems in D-Band'', in \emph{IEEE Transactions on Circuits and Systems II: Express Briefs}, vol. 68, no. 7, pp. 2277-2281, July 2021}
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\end{frame}
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\begin{frame}
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\frametitle{Operating Point: Transimpedance Amplifier}
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\begin{minipage}{0.5\textwidth}
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\begin{itemize}
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\item Operation
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\begin{itemize}
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\item Conversion of switched current to voltage, amplification
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\item Modified Cherry-Hooper topology: decoupling of bandwidth and gain, modification for greater dynamic range
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\end{itemize}
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\end{itemize}
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\bigskip
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\begin{itemize}
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\item Determination of operating point
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\begin{itemize}
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\item Exact value of supply voltage not crucial
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\item S-parameter simulation: Examination of maximum available gain ($\mathit{MAG}$) and minimum noise figure ($\mathit{NF}_\text{min}$)
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\end{itemize}
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\end{itemize}
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\end{minipage}%
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\begin{minipage}{0.5\textwidth}
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\vspace*{-6mm}
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\begin{figure}[H]
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\centering
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\hspace*{-8mm}
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\includegraphics[width=0.83\textwidth]{res/simulation/TIA_OP_01.pdf}
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\vspace*{-20mm}
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\hspace*{58mm}%
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\includegraphics[width=0.33\textwidth]{res/simulation/TIA_OP_02.pdf}
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\end{figure}
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\end{minipage}
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\end{frame}
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\begin{frame}
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\frametitle{Operating Point: Buffer}
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\begin{minipage}{0.45\textwidth}
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\begin{itemize}
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\item Operation
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\begin{itemize}
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\item Amplification of signal
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\item Comprises three stages: two differential amplifiers and an emitter follower
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\end{itemize}
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\end{itemize}
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\bigskip
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\begin{itemize}
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\item Determination of operating point
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\begin{itemize}
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\item Exact value of supply voltage not crucial at this point
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\item S-parameter simulation: Examination of $\mathit{MAG}$ and $\mathit{NF}_\text{min}$
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\item \textbf{Note}: Adjustment with respect to linearity at the very end
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\item [TODO] Switch figure with correct one (add peaking inductance)
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\end{itemize}
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\end{itemize}
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\end{minipage}%
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\begin{minipage}{0.57\textwidth}
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\vspace*{-5mm}
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\begin{figure}[H]
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\hspace*{2mm}%
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\includegraphics[width=1\textwidth]{res/simulation/Buffer.pdf}
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\end{figure}
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\end{minipage}
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\end{frame}
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\begin{frame}
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\frametitle{Integration: SQuad \& TIA}
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\begin{minipage}{0.45\textwidth}
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\begin{itemize}
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\item DC coupling $\rightarrow$ Redesign of bias circuitry
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\item Supply voltage fixed to $\SI{2.5}{\volt}$ to not exceed breakdown voltage of transistors
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\item Examination using Harmonic-Balance simulation:
|
||||
\begin{itemize}
|
||||
\item Conversion gain
|
||||
\item $\SI{1}{dB}$ compression point ($P_{\SI{1}{dB}}$)
|
||||
\item[TODO] Noise figure
|
||||
\end{itemize}
|
||||
\end{itemize}
|
||||
\end{minipage}%
|
||||
\begin{minipage}{0.6\textwidth}
|
||||
\vspace*{-38mm}
|
||||
\begin{figure}[H]
|
||||
\includegraphics[width=0.67\textwidth]{res/simulation/INT_SQuad_TIA_01.pdf}
|
||||
|
||||
\vspace*{-50mm}
|
||||
\hspace{-70mm}%
|
||||
\includegraphics[width=0.28\textwidth]{res/simulation/INT_SQuad_TIA_02.pdf}
|
||||
|
||||
\vspace*{-20mm}
|
||||
\hspace{60mm}%
|
||||
\includegraphics[width=0.22\textwidth]{res/simulation/INT_SQuad_TIA_03.pdf}
|
||||
\end{figure}
|
||||
\end{minipage}
|
||||
\end{frame}
|
||||
|
||||
\begin{frame}
|
||||
\frametitle{Integration: SQuad, TIA \& Buffer}
|
||||
|
||||
\begin{itemize}
|
||||
\item [TODO] Simulation schematics
|
||||
\item [TODO] Differences to schematic from paper (if any)
|
||||
\item AC coupling $\rightarrow$ No redesign of bias circuitry required
|
||||
\end{itemize}
|
||||
\end{frame}
|
||||
|
||||
\begin{frame}
|
||||
\frametitle{Design steps}
|
||||
|
||||
\begin{itemize}
|
||||
\item [TODO] Idea: approach from lecture: first worry about actual circuit, biasing later
|
||||
\item [TODO] Choice of transistors
|
||||
\item [TODO] Choice of operating points
|
||||
\item [TODO] Rest of schematic details (?)
|
||||
\end{itemize}
|
||||
\frametitle{Further Optimization: \ldots}
|
||||
\end{frame}
|
||||
|
||||
\begin{frame}
|
||||
\frametitle{Simulation Results}
|
||||
|
||||
\begin{itemize}
|
||||
\item [TODO] Simulation results
|
||||
\item [TODO] Intuitive explanation of results
|
||||
\end{itemize}
|
||||
\end{frame}
|
||||
|
||||
\begin{frame}
|
||||
\frametitle{Comparison with Standard Topology}
|
||||
|
||||
\begin{itemize}
|
||||
\item [TODO] (Remove if not applicable)
|
||||
\item [TODO] Comparison of pros and cons of each topology
|
||||
\item [TODO] Comparison of simulation results
|
||||
\end{itemize}
|
||||
\end{frame}
|
||||
%\begin{frame}
|
||||
% \frametitle{Simulation Setup}
|
||||
%
|
||||
% \begin{figure}[H]
|
||||
% \centering
|
||||
%
|
||||
% \includegraphics[width=0.6\textwidth]{res/simulation/schematic.pdf}
|
||||
% \end{figure}
|
||||
%
|
||||
% \begin{itemize}
|
||||
% \item [TODO] Simulation schematics
|
||||
% \item [TODO] Differences to schematic from paper (if any)
|
||||
% \end{itemize}
|
||||
%\end{frame}
|
||||
%
|
||||
%\begin{frame}
|
||||
% \frametitle{Design Steps}
|
||||
%
|
||||
% \begin{itemize}
|
||||
% \item [TODO] Idea: approach from lecture: first worry about actual circuit, biasing later
|
||||
% \item [TODO] Choice of transistors
|
||||
% \item [TODO] Choice of operating points
|
||||
% \item [TODO] Rest of schematic details (?)
|
||||
% \end{itemize}
|
||||
%\end{frame}
|
||||
%
|
||||
%\begin{frame}
|
||||
% \frametitle{Simulation Results}
|
||||
%
|
||||
% \begin{itemize}
|
||||
% \item [TODO] Simulation results
|
||||
% \item [TODO] Intuitive explanation of results
|
||||
% \end{itemize}
|
||||
%\end{frame}
|
||||
%
|
||||
%\begin{frame}
|
||||
% \frametitle{Comparison with Standard Topology}
|
||||
%
|
||||
% \begin{itemize}
|
||||
% \item [TODO] (Remove if not applicable)
|
||||
% \item [TODO] Comparison of pros and cons of each topology
|
||||
% \item [TODO] Comparison of simulation results
|
||||
% \end{itemize}
|
||||
%\end{frame}
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
\label{sec:Discussion}
|
||||
|
||||
\begin{frame}
|
||||
\frametitle{Own observations}
|
||||
\frametitle{Own Observations}
|
||||
|
||||
\begin{itemize}
|
||||
\item [TODO] Own observations of behavior
|
||||
@ -11,7 +11,7 @@
|
||||
\end{frame}
|
||||
|
||||
\begin{frame}
|
||||
\frametitle{Further simulations}
|
||||
\frametitle{Further Simulations}
|
||||
|
||||
\begin{itemize}
|
||||
\item [TODO] (Remove if not applicable)
|
||||
|
||||
35
structure.md
35
structure.md
@ -36,3 +36,38 @@
|
||||
|
||||
- Layout issues and optimization are out of scope, in case they exist in the
|
||||
paper
|
||||
|
||||
## TODO
|
||||
|
||||
- Compare technologies (B11HFC, SG13G2)
|
||||
- What are the benefits of SiGe? (e.g., RF on same chip as digital stuff)
|
||||
- How does the proposed topology work?
|
||||
- Why the TIA?
|
||||
- How does the TIA work?
|
||||
- Why do transmission-line based differential L-type matching networks have a
|
||||
high bandwidth?
|
||||
- How can we just remove the bottom transistors?
|
||||
- Intuitive explanations of paper simulation results
|
||||
- Why do single-ended chip interfaces enable a dense chip-to-package
|
||||
transition?
|
||||
- Stuff from background slide:
|
||||
- Relevant theoretical background on mixers
|
||||
- What is special about zero-IF mixers?
|
||||
- ~What is special about broadband mixers/devices?~ Take a look ad broadband
|
||||
IC notes
|
||||
- What is special about down-conversion mixers?
|
||||
- What is special about BiCMOS technology?
|
||||
- ~What is D-Band?~
|
||||
- Simulation
|
||||
|
||||
## Ideas for further simulations
|
||||
|
||||
- Change the buffer resistors to inductors (drawback: larger size)
|
||||
- Remove feedback path from TIA (and ensure stability by other means)
|
||||
|
||||
## Other notes
|
||||
|
||||
- LSSP: Normal S-Parameters are determined for linearized systems. For this
|
||||
reason, they are only tools of small-signal analysis. Large-Signal
|
||||
S-Parameters are defined similarly (ratios of power going in/out) but are
|
||||
computed considering non-linearities.
|
||||
|
||||
Loading…
Reference in New Issue
Block a user