Add figures and stuff

This commit is contained in:
Andreas Tsouchlos 2024-09-09 04:19:27 +02:00
parent 2246f5617f
commit 4267d4991e
29 changed files with 388 additions and 84 deletions

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\usepackage{listings}
\usepackage{subcaption}
\usepackage{bbm}
\usepackage{siunitx}
\usepackage[export]{adjustbox}
%
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\pgfplotsset{colorscheme/cel}
\input{common.tex}
\newcommand{\lineintext}[1]{%
\begin{tikzpicture}
\draw[#1] (0,0) -- (1.5em,0);
% Dummy node taking up the space of a letter to fix spacing
\node[outer sep=0, inner sep=0] () at (0.75em,0) {\phantom{a}};
\end{tikzpicture}%
}
%
%
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\setnextsection{0}
\input{sections/01_background_and_intro.tex}
%\input{sections/01_background_and_intro.tex}
\input{sections/02_proposed_ideas.tex}
\input{sections/03_simulation_results.tex}
\input{sections/04_discussion.tex}

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\label{sec:Background and Introduction}
\begin{frame}
\frametitle{Theoretical background}
\frametitle{Theoretical Background}
\begin{itemize}
\item [TODO] Relevant theoretical background on mixers
\item [TODO] What is special about broadband mixers/devices?
\item [TODO] What is special about zero-IF mixers?
\item [TODO] What is special about down-conversion mixers?
\item [TODO] What is special about BiCMOS technology?

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@ -2,70 +2,170 @@
\section{Proposed Ideas}
\label{sec:Proposed Ideas}
% \begin{frame}[t]
% \frametitle{Overview of Proposed Design}
%
% \vspace*{-5mm}
%
% \begin{itemize}
% \item Paper by Maiwald, \emph{et al}. \citereference{Mai+21}
% \end{itemize}
%
% \begin{figure}[h]
% \centering
%
% \begin{subfigure}{0.33\textwidth}
% \centering
%
% \fbox{\includegraphics[page=1,width=.6\textwidth]{res/paper/mixer_paper}}
% \end{subfigure}%
% \begin{subfigure}{0.33\textwidth}
% \centering
%
% \fbox{\includegraphics[page=2,width=.6\textwidth]{res/paper/mixer_paper}}
% \end{subfigure}%
% \begin{subfigure}{0.33\textwidth}
% \centering
%
% \fbox{\includegraphics[page=4,width=.6\textwidth]{res/paper/mixer_paper}}
% \end{subfigure}%
% \end{figure}
%
% \begin{itemize}
% \item Spec 1
% \item Spec 2
% \item Spec 3
% \end{itemize}
%
% \bigskip
%
% \addreference{Mai+21}{T. Maiwald et al., "A Broadband Zero-IF Down-Conversion Mixer in 130 nm SiGe BiCMOS for Beyond 5G Communication Systems in D-Band," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 68, no. 7, pp. 2277-2281, July 2021}
% \end{frame}
\begin{frame}[t]
\frametitle{Overview of Proposed Design}
\vspace*{-5mm}
\vspace*{-7mm}
\begin{itemize}
\item Paper by Maiwald, \emph{et al}. \citereference{Mai21}
\item Paper by Maiwald, \emph{et al}. \citereference{Mai+21}
\end{itemize}
\vspace*{1mm}
\begin{figure}[h]
\centering
\begin{subfigure}{0.33\textwidth}
\begin{subfigure}[c]{0.33\textwidth}
\centering
\fbox{\includegraphics[page=1,width=.6\textwidth]{res/mixer_paper}}
\fbox{\includegraphics[page=1,width=.6\textwidth]{res/paper/mixer_paper}}
\end{subfigure}%
\begin{subfigure}{0.33\textwidth}
\begin{subfigure}[c]{0.33\textwidth}
\centering
\fbox{\includegraphics[page=2,width=.6\textwidth]{res/mixer_paper}}
\end{subfigure}%
\begin{subfigure}{0.33\textwidth}
\centering
\fbox{\includegraphics[page=4,width=.6\textwidth]{res/mixer_paper}}
\includegraphics[width=\textwidth]{res/paper/figure1}
\end{subfigure}%
\end{figure}
\vspace*{1mm}
\begin{itemize}
\item Spec 1
\item Spec 2
\item Spec 3
\item High bandwidth, low power consumption, small size
\item Applicable to electronic beam stearing for mm-Wave
\item SiGe BiCMOS technology (B11HFC) from Infineon Technologies AG with $f_\text{t}/f_\text{max}$ of $250/\SI{370}{\giga\hertz}$
\end{itemize}
\bigskip
\vspace*{2mm}
\addreference{Mai+21}{T. Maiwald et al., ``A Broadband Zero-IF Down-Conversion Mixer in 130 nm SiGe BiCMOS for Beyond 5G Communication Systems in D-Band'', in \emph{IEEE Transactions on Circuits and Systems II: Express Briefs}, vol. 68, no. 7, pp. 2277-2281, July 2021}
\end{frame}
\addreference{Mai21}{T. Maiwald et al., "A Broadband Zero-IF Down-Conversion Mixer in 130 nm SiGe BiCMOS for Beyond 5G Communication Systems in D-Band," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 68, no. 7, pp. 2277-2281, July 2021}
%\begin{frame}
% \frametitle{Semiconductor Technology}
%
% \begin{itemize}
% \item [TODO] (Maybe move to paper overview slide)
% \item [TODO] "130 nm SiGe BiCMOS technology with a ft/fmax
% of 250/370 GHz from Infineon Technologies AG." (SG13G2) vs
% "SiGe BiCMOS process technology from IHP Microelectronics
% with fmax of 500 GHz" (B11HFC)
% -> Same kind of technology, different manufacturerer and fmax
% \end{itemize}
%\end{frame}
\begin{frame}[fragile]
\frametitle{Proposed Design: Mixer Core Cell}
\begin{minipage}{.5\textwidth}
\begin{itemize}
\item Usage of switching quad (SQuad) instead of conventional Gilbert cell for more voltage headroom
\item Mixer loaded by modified Cherry-Hooper \citereference{CH63} transimpedance amplifier (TIA)
\item Transmission-line based differential L-type matching networks for high bandwidth
\item Signal fed using marchand baluns for high bandwidth
\end{itemize}
\end{minipage}%
\begin{minipage}{.5\textwidth}
\centering
\vspace*{-2mm}
\begin{figure}[H]
\centering
\includegraphics[width=0.96\textwidth]{res/paper/figure6}
\end{figure}
\end{minipage}%
\vspace{3mm}
\addreference{CH63}{E.M. Cherry and D.E. Hooper, ``The design of wide-band transistor feedback amplifiers'', \emph{Proceedings of the Institution of Electrical Engineers}, vol. 110, pp. 375-389, February 1963}
\end{frame}
\begin{frame}[fragile]
\frametitle{Proposed Design: IF Buffer}
\vspace*{5.775mm}
\begin{minipage}{.5\textwidth}
\begin{itemize}
\item Three-stages: two differential amplifier stages and an emitter follower
\item Includes differential to single-ended conversion enabling dense chip-to-package transition
\item Inductive peaking for bandwidth enhancement
\end{itemize}
\end{minipage}%
\begin{minipage}{.5\textwidth}
\centering
\begin{figure}[H]
\centering
\includegraphics[width=0.96\textwidth]{res/paper/figure7}
\end{figure}
\end{minipage}%
\end{frame}
\begin{frame}
\frametitle{Semiconductor Technology}
\frametitle{Simulation and Measurement Results}
\begin{itemize}
\item [TODO] (Remove if not enough info provided in paper)
\item [TODO] Comparison with IHP Technology
\end{itemize}
\end{frame}
\begin{frame}
\frametitle{Proposed Design}
\begin{itemize}
\item [TODO] Circuit schematics from paper
\item [TODO] Explanation of which topology is used an why
\item [TODO] Is there anything unconventional about the design?
\end{itemize}
\end{frame}
\begin{frame}
\frametitle{Results from Proposed Design}
\begin{itemize}
\item [TODO] Simulation results
\item [TODO] Measurement results
\end{itemize}
\begin{minipage}{.5\textwidth}
\vspace*{-2mm}
\begin{figure}[H]
\centering
\includegraphics[width=0.9\textwidth]{res/paper/figure9}
\end{figure}
\vspace*{-3mm}
\begin{figure}[H]
\centering
\hspace*{-7mm}
\includegraphics[width=0.9\textwidth]{res/paper/figure11}
\end{figure}
\end{minipage}%
\begin{minipage}{.5\textwidth}
\vspace*{-2mm}
\begin{figure}[H]
\centering
\includegraphics[width=0.9\textwidth]{res/paper/figure10}
\end{figure}
\vspace*{-3mm}
\begin{figure}[H]
\centering
\hspace*{-4mm}
\includegraphics[width=0.9\textwidth]{res/paper/figure12}
\end{figure}
\end{minipage}
\end{frame}

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@ -1,42 +1,217 @@
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
\section{Simulation Results}
\label{sec:Simulation Results}
\section{Own Simulations}
\label{sec:Own Simulation}
\begin{frame}
\frametitle{Simulation Setup}
\frametitle{Design Steps}
\begin{enumerate}
\item Determination of operating point of individual stages
\begin{itemize}
\item SQuad
\item TIA
\item Buffer
\end{itemize}
\item Integration
\begin{itemize}
\item SQuad \& TIA
\item SQuad, TIA \& Buffer
\end{itemize}
\item Matching of input and output
\item Replacement of remaining DC blocks/feeds in bias circuitry
\item Final optimization
\end{enumerate}
\end{frame}
\begin{frame}
\frametitle{Operating Point: Switching Quad}
\begin{minipage}{0.5\textwidth}
\begin{itemize}
\item Operation
\begin{itemize}
\item Responsible for actual mixing
\item Multiplication of RF-signal with square wave $\rightarrow$ generation of mixing products at IF-frequency and harmonics
\end{itemize}
\end{itemize}
\bigskip
\begin{itemize}
\item Determination of operating point
\begin{itemize}
\item Exact value of $V_\text{CE}$ not crucial
\item $V_\text{BE}$: Examination of $s_\text{21}$
of Large-signal s-parameter simulation and noise figure (analogous to \citereference{Mai+21})
\item [TODO] (Simulate noise figure or remove text)
\end{itemize}
\end{itemize}
\end{minipage}%
\begin{minipage}{0.5\textwidth}
\centering
\begin{figure}[H]
\vspace*{-5mm}
\hspace*{15mm}%
\includegraphics[width=0.83\textwidth]{res/simulation/SQuad_OP_01.pdf}
\vspace*{-18mm}
\hspace*{-55mm}%
\includegraphics[width=0.4\textwidth]{res/simulation/SQuad_OP_02.pdf}
\end{figure}
\end{minipage}
\vspace{4mm}
\addreference{Mai+21}{T. Maiwald et al., ``A Broadband Zero-IF Down-Conversion Mixer in 130 nm SiGe BiCMOS for Beyond 5G Communication Systems in D-Band'', in \emph{IEEE Transactions on Circuits and Systems II: Express Briefs}, vol. 68, no. 7, pp. 2277-2281, July 2021}
\end{frame}
\begin{frame}
\frametitle{Operating Point: Transimpedance Amplifier}
\begin{minipage}{0.5\textwidth}
\begin{itemize}
\item Operation
\begin{itemize}
\item Conversion of switched current to voltage, amplification
\item Modified Cherry-Hooper topology: decoupling of bandwidth and gain, modification for greater dynamic range
\end{itemize}
\end{itemize}
\bigskip
\begin{itemize}
\item Determination of operating point
\begin{itemize}
\item Exact value of supply voltage not crucial
\item S-parameter simulation: Examination of maximum available gain ($\mathit{MAG}$) and minimum noise figure ($\mathit{NF}_\text{min}$)
\end{itemize}
\end{itemize}
\end{minipage}%
\begin{minipage}{0.5\textwidth}
\vspace*{-6mm}
\begin{figure}[H]
\centering
\hspace*{-8mm}
\includegraphics[width=0.83\textwidth]{res/simulation/TIA_OP_01.pdf}
\vspace*{-20mm}
\hspace*{58mm}%
\includegraphics[width=0.33\textwidth]{res/simulation/TIA_OP_02.pdf}
\end{figure}
\end{minipage}
\end{frame}
\begin{frame}
\frametitle{Operating Point: Buffer}
\begin{minipage}{0.45\textwidth}
\begin{itemize}
\item Operation
\begin{itemize}
\item Amplification of signal
\item Comprises three stages: two differential amplifiers and an emitter follower
\end{itemize}
\end{itemize}
\bigskip
\begin{itemize}
\item Determination of operating point
\begin{itemize}
\item Exact value of supply voltage not crucial at this point
\item S-parameter simulation: Examination of $\mathit{MAG}$ and $\mathit{NF}_\text{min}$
\item \textbf{Note}: Adjustment with respect to linearity at the very end
\item [TODO] Switch figure with correct one (add peaking inductance)
\end{itemize}
\end{itemize}
\end{minipage}%
\begin{minipage}{0.57\textwidth}
\vspace*{-5mm}
\begin{figure}[H]
\hspace*{2mm}%
\includegraphics[width=1\textwidth]{res/simulation/Buffer.pdf}
\end{figure}
\end{minipage}
\end{frame}
\begin{frame}
\frametitle{Integration: SQuad \& TIA}
\begin{minipage}{0.45\textwidth}
\begin{itemize}
\item DC coupling $\rightarrow$ Redesign of bias circuitry
\item Supply voltage fixed to $\SI{2.5}{\volt}$ to not exceed breakdown voltage of transistors
\item Examination using Harmonic-Balance simulation:
\begin{itemize}
\item Conversion gain
\item $\SI{1}{dB}$ compression point ($P_{\SI{1}{dB}}$)
\item[TODO] Noise figure
\end{itemize}
\end{itemize}
\end{minipage}%
\begin{minipage}{0.6\textwidth}
\vspace*{-38mm}
\begin{figure}[H]
\includegraphics[width=0.67\textwidth]{res/simulation/INT_SQuad_TIA_01.pdf}
\vspace*{-50mm}
\hspace{-70mm}%
\includegraphics[width=0.28\textwidth]{res/simulation/INT_SQuad_TIA_02.pdf}
\vspace*{-20mm}
\hspace{60mm}%
\includegraphics[width=0.22\textwidth]{res/simulation/INT_SQuad_TIA_03.pdf}
\end{figure}
\end{minipage}
\end{frame}
\begin{frame}
\frametitle{Integration: SQuad, TIA \& Buffer}
\begin{itemize}
\item [TODO] Simulation schematics
\item [TODO] Differences to schematic from paper (if any)
\item AC coupling $\rightarrow$ No redesign of bias circuitry required
\end{itemize}
\end{frame}
\begin{frame}
\frametitle{Design steps}
\begin{itemize}
\item [TODO] Idea: approach from lecture: first worry about actual circuit, biasing later
\item [TODO] Choice of transistors
\item [TODO] Choice of operating points
\item [TODO] Rest of schematic details (?)
\end{itemize}
\frametitle{Further Optimization: \ldots}
\end{frame}
\begin{frame}
\frametitle{Simulation Results}
\begin{itemize}
\item [TODO] Simulation results
\item [TODO] Intuitive explanation of results
\end{itemize}
\end{frame}
\begin{frame}
\frametitle{Comparison with Standard Topology}
\begin{itemize}
\item [TODO] (Remove if not applicable)
\item [TODO] Comparison of pros and cons of each topology
\item [TODO] Comparison of simulation results
\end{itemize}
\end{frame}
%\begin{frame}
% \frametitle{Simulation Setup}
%
% \begin{figure}[H]
% \centering
%
% \includegraphics[width=0.6\textwidth]{res/simulation/schematic.pdf}
% \end{figure}
%
% \begin{itemize}
% \item [TODO] Simulation schematics
% \item [TODO] Differences to schematic from paper (if any)
% \end{itemize}
%\end{frame}
%
%\begin{frame}
% \frametitle{Design Steps}
%
% \begin{itemize}
% \item [TODO] Idea: approach from lecture: first worry about actual circuit, biasing later
% \item [TODO] Choice of transistors
% \item [TODO] Choice of operating points
% \item [TODO] Rest of schematic details (?)
% \end{itemize}
%\end{frame}
%
%\begin{frame}
% \frametitle{Simulation Results}
%
% \begin{itemize}
% \item [TODO] Simulation results
% \item [TODO] Intuitive explanation of results
% \end{itemize}
%\end{frame}
%
%\begin{frame}
% \frametitle{Comparison with Standard Topology}
%
% \begin{itemize}
% \item [TODO] (Remove if not applicable)
% \item [TODO] Comparison of pros and cons of each topology
% \item [TODO] Comparison of simulation results
% \end{itemize}
%\end{frame}

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@ -3,7 +3,7 @@
\label{sec:Discussion}
\begin{frame}
\frametitle{Own observations}
\frametitle{Own Observations}
\begin{itemize}
\item [TODO] Own observations of behavior
@ -11,7 +11,7 @@
\end{frame}
\begin{frame}
\frametitle{Further simulations}
\frametitle{Further Simulations}
\begin{itemize}
\item [TODO] (Remove if not applicable)

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- Layout issues and optimization are out of scope, in case they exist in the
paper
## TODO
- Compare technologies (B11HFC, SG13G2)
- What are the benefits of SiGe? (e.g., RF on same chip as digital stuff)
- How does the proposed topology work?
- Why the TIA?
- How does the TIA work?
- Why do transmission-line based differential L-type matching networks have a
high bandwidth?
- How can we just remove the bottom transistors?
- Intuitive explanations of paper simulation results
- Why do single-ended chip interfaces enable a dense chip-to-package
transition?
- Stuff from background slide:
- Relevant theoretical background on mixers
- What is special about zero-IF mixers?
- ~What is special about broadband mixers/devices?~ Take a look ad broadband
IC notes
- What is special about down-conversion mixers?
- What is special about BiCMOS technology?
- ~What is D-Band?~
- Simulation
## Ideas for further simulations
- Change the buffer resistors to inductors (drawback: larger size)
- Remove feedback path from TIA (and ensure stability by other means)
## Other notes
- LSSP: Normal S-Parameters are determined for linearized systems. For this
reason, they are only tools of small-signal analysis. Large-Signal
S-Parameters are defined similarly (ratios of power going in/out) but are
computed considering non-linearities.