218 lines
6.3 KiB
TeX
218 lines
6.3 KiB
TeX
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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\section{Own Simulations}
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\label{sec:Own Simulation}
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\begin{frame}
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\frametitle{Design Steps}
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\begin{enumerate}
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\item Determination of operating point of individual stages
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\begin{itemize}
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\item SQuad
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\item TIA
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\item Buffer
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\end{itemize}
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\item Integration
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\begin{itemize}
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\item SQuad \& TIA
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\item SQuad, TIA \& Buffer
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\end{itemize}
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\item Matching of input and output
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\item Replacement of remaining DC blocks/feeds in bias circuitry
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\item Final optimization
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\end{enumerate}
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\end{frame}
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\begin{frame}
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\frametitle{Operating Point: Switching Quad}
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\begin{minipage}{0.5\textwidth}
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\begin{itemize}
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\item Operation
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\begin{itemize}
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\item Responsible for actual mixing
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\item Multiplication of RF-signal with square wave $\rightarrow$ generation of mixing products at IF-frequency and harmonics
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\end{itemize}
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\end{itemize}
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\bigskip
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\begin{itemize}
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\item Determination of operating point
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\begin{itemize}
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\item Exact value of $V_\text{CE}$ not crucial
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\item $V_\text{BE}$: Examination of $s_\text{21}$
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of Large-signal s-parameter simulation and noise figure (analogous to \citereference{Mai+21})
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\item [TODO] (Simulate noise figure or remove text)
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\end{itemize}
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\end{itemize}
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\end{minipage}%
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\begin{minipage}{0.5\textwidth}
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\centering
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\begin{figure}[H]
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\vspace*{-5mm}
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\hspace*{15mm}%
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\includegraphics[width=0.83\textwidth]{res/simulation/SQuad_OP_01.pdf}
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\vspace*{-18mm}
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\hspace*{-55mm}%
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\includegraphics[width=0.4\textwidth]{res/simulation/SQuad_OP_02.pdf}
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\end{figure}
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\end{minipage}
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\vspace{4mm}
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\addreference{Mai+21}{T. Maiwald et al., ``A Broadband Zero-IF Down-Conversion Mixer in 130 nm SiGe BiCMOS for Beyond 5G Communication Systems in D-Band'', in \emph{IEEE Transactions on Circuits and Systems II: Express Briefs}, vol. 68, no. 7, pp. 2277-2281, July 2021}
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\end{frame}
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\begin{frame}
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\frametitle{Operating Point: Transimpedance Amplifier}
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\begin{minipage}{0.5\textwidth}
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\begin{itemize}
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\item Operation
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\begin{itemize}
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\item Conversion of switched current to voltage, amplification
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\item Modified Cherry-Hooper topology: decoupling of bandwidth and gain, modification for greater dynamic range
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\end{itemize}
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\end{itemize}
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\bigskip
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\begin{itemize}
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\item Determination of operating point
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\begin{itemize}
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\item Exact value of supply voltage not crucial
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\item S-parameter simulation: Examination of maximum available gain ($\mathit{MAG}$) and minimum noise figure ($\mathit{NF}_\text{min}$)
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\end{itemize}
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\end{itemize}
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\end{minipage}%
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\begin{minipage}{0.5\textwidth}
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\vspace*{-6mm}
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\begin{figure}[H]
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\centering
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\hspace*{-8mm}
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\includegraphics[width=0.83\textwidth]{res/simulation/TIA_OP_01.pdf}
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\vspace*{-20mm}
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\hspace*{58mm}%
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\includegraphics[width=0.33\textwidth]{res/simulation/TIA_OP_02.pdf}
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\end{figure}
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\end{minipage}
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\end{frame}
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\begin{frame}
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\frametitle{Operating Point: Buffer}
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\begin{minipage}{0.45\textwidth}
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\begin{itemize}
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\item Operation
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\begin{itemize}
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\item Amplification of signal
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\item Comprises three stages: two differential amplifiers and an emitter follower
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\end{itemize}
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\end{itemize}
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\bigskip
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\begin{itemize}
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\item Determination of operating point
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\begin{itemize}
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\item Exact value of supply voltage not crucial at this point
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\item S-parameter simulation: Examination of $\mathit{MAG}$ and $\mathit{NF}_\text{min}$
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\item \textbf{Note}: Adjustment with respect to linearity at the very end
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\item [TODO] Switch figure with correct one (add peaking inductance)
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\end{itemize}
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\end{itemize}
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\end{minipage}%
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\begin{minipage}{0.57\textwidth}
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\vspace*{-5mm}
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\begin{figure}[H]
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\hspace*{2mm}%
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\includegraphics[width=1\textwidth]{res/simulation/Buffer.pdf}
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\end{figure}
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\end{minipage}
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\end{frame}
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\begin{frame}
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\frametitle{Integration: SQuad \& TIA}
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\begin{minipage}{0.45\textwidth}
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\begin{itemize}
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\item DC coupling $\rightarrow$ Redesign of bias circuitry
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\item Supply voltage fixed to $\SI{2.5}{\volt}$ to not exceed breakdown voltage of transistors
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\item Examination using Harmonic-Balance simulation:
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\begin{itemize}
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\item Conversion gain
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\item $\SI{1}{dB}$ compression point ($P_{\SI{1}{dB}}$)
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\item[TODO] Noise figure
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\end{itemize}
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\end{itemize}
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\end{minipage}%
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\begin{minipage}{0.6\textwidth}
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\vspace*{-38mm}
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\begin{figure}[H]
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\includegraphics[width=0.67\textwidth]{res/simulation/INT_SQuad_TIA_01.pdf}
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\vspace*{-50mm}
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\hspace{-70mm}%
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\includegraphics[width=0.28\textwidth]{res/simulation/INT_SQuad_TIA_02.pdf}
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\vspace*{-20mm}
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\hspace{60mm}%
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\includegraphics[width=0.22\textwidth]{res/simulation/INT_SQuad_TIA_03.pdf}
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\end{figure}
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\end{minipage}
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\end{frame}
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\begin{frame}
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\frametitle{Integration: SQuad, TIA \& Buffer}
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\begin{itemize}
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\item AC coupling $\rightarrow$ No redesign of bias circuitry required
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\end{itemize}
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\end{frame}
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\begin{frame}
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\frametitle{Further Optimization: \ldots}
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\end{frame}
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%\begin{frame}
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% \frametitle{Simulation Setup}
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%
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% \begin{figure}[H]
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% \centering
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%
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% \includegraphics[width=0.6\textwidth]{res/simulation/schematic.pdf}
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% \end{figure}
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%
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% \begin{itemize}
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% \item [TODO] Simulation schematics
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% \item [TODO] Differences to schematic from paper (if any)
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% \end{itemize}
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%\end{frame}
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%
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%\begin{frame}
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% \frametitle{Design Steps}
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%
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% \begin{itemize}
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% \item [TODO] Idea: approach from lecture: first worry about actual circuit, biasing later
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% \item [TODO] Choice of transistors
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% \item [TODO] Choice of operating points
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% \item [TODO] Rest of schematic details (?)
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% \end{itemize}
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%\end{frame}
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%
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%\begin{frame}
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% \frametitle{Simulation Results}
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%
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% \begin{itemize}
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% \item [TODO] Simulation results
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% \item [TODO] Intuitive explanation of results
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% \end{itemize}
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%\end{frame}
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%
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%\begin{frame}
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% \frametitle{Comparison with Standard Topology}
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%
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% \begin{itemize}
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% \item [TODO] (Remove if not applicable)
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% \item [TODO] Comparison of pros and cons of each topology
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% \item [TODO] Comparison of simulation results
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% \end{itemize}
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%\end{frame}
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