an.tsouchlos/rfics-presentation
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rfics-presentation/res/simulation
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Andreas Tsouchlos a7b4ad0632 Add everything but final circuit
2024-09-09 21:45:21 +02:00
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Buffer_OP_MaxGain_vs_IC.csv
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2024-09-09 21:45:21 +02:00
Buffer_OP_NFmin_vs_IC.csv
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2024-09-09 21:45:21 +02:00
Buffer_OP.pdf
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Buffer.pdf
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2024-09-09 04:19:27 +02:00
INT_Buffer_ConvGain_vs_LOPow.csv
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2024-09-09 21:45:21 +02:00
INT_Buffer_ConvGain_vs_RFFreq.csv
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2024-09-09 21:45:21 +02:00
INT_Buffer_ConvGain_vs_RFPow.csv
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INT_Buffer_noise.csv
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INT_Buffer.pdf
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INT_SQuad_TIA_01.pdf
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INT_SQuad_TIA_02.pdf
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INT_SQuad_TIA_03.pdf
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INT_SQuad_TIA_ConvGain_vs_LOPow.csv
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2024-09-09 17:24:16 +02:00
INT_SQuad_TIA_ConvGain_vs_RFFreq.csv
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2024-09-09 17:24:16 +02:00
INT_SQuad_TIA_ConvGain_vs_RFPow.csv
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INT_SQuad_TIA_noise.csv
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schematic.pdf
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SQuad_NFdsb.csv
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SQuad_OP_01.pdf
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SQuad_OP_02.pdf
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SQuad_OP_s21_vs_VBE.csv
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2024-09-09 17:24:16 +02:00
TIA_OP_01.pdf
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2024-09-09 21:45:21 +02:00
TIA_OP_02.pdf
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2024-09-09 04:19:27 +02:00
TIA_OP_MaxGain_vs_IC.csv
Add everything but final circuit
2024-09-09 21:45:21 +02:00
TIA_OP_NFmin_vs_IC.csv
Add everything but final circuit
2024-09-09 21:45:21 +02:00