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Andreas Tsouchlos 2024-09-10 05:22:46 +02:00
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commit 0aa778c8a1
3 changed files with 17 additions and 17 deletions
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4
sections/02_proposed_ideas.tex
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@ -71,9 +71,9 @@
\vspace*{1mm} \vspace*{1mm}
\begin{itemize} \begin{itemize}
\item High bandwidth, low power consumption, small size \item High bandwidth, low noise figure, low power consumption, small size
\item Applicable to electronic beam stearing for mm-Wave \item Applicable to electronic beam stearing for mm-Wave
\item SiGe BiCMOS technology (B11HFC) from Infineon Technologies AG with $f_\text{t}/f_\text{max}$ of $250/\SI{370}{\giga\hertz}$ \item 130nm SiGe BiCMOS technology from Infineon Technologies AG with $f_\text{t}/f_\text{max}$ of $250/\SI{370}{\giga\hertz}$
\end{itemize} \end{itemize}
\vspace*{2mm} \vspace*{2mm}

4
sections/03_simulation_results.tex
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@ -18,7 +18,7 @@
\item SQuad, TIA \& Buffer \item SQuad, TIA \& Buffer
\end{itemize} \end{itemize}
\item Further iterative optimization of parameters (e.g., determine LO power,\\ increase buffer current for linearity, \ldots) \item Further iterative optimization of parameters (e.g., determine LO power,\\ increase buffer current for linearity, \ldots)
\item Matching of input and output \item Matching
\end{enumerate} \end{enumerate}
\end{frame} \end{frame}
@ -288,6 +288,7 @@
\begin{itemize} \begin{itemize}
\item Conversion gain \item Conversion gain
\item $\SI{1}{dB}$ compression point ($P_{\SI{1}{dB}}$) \item $\SI{1}{dB}$ compression point ($P_{\SI{1}{dB}}$)
\item Noise figure
\end{itemize} \end{itemize}
\end{itemize} \end{itemize}
\end{minipage}% \end{minipage}%
@ -402,6 +403,7 @@
\begin{itemize} \begin{itemize}
\item Conversion gain \item Conversion gain
\item $\SI{1}{dB}$ compression point ($P_{\SI{1}{dB}}$) \item $\SI{1}{dB}$ compression point ($P_{\SI{1}{dB}}$)
\item Noise figure
\end{itemize} \end{itemize}
\end{itemize} \end{itemize}
\end{minipage}% \end{minipage}%

14
sections/05_conclusion.tex
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@ -5,6 +5,12 @@
\frametitle{Discussion \& Conclusion} \frametitle{Discussion \& Conclusion}
\begin{itemize} \begin{itemize}
\item Own simulations
\begin{itemize}
\item Better results to be expected (technology with higher $f_\text{t}$, $f_\text{max}$, stability not considered)
\item Maybe better results by using current mirrors to set operating points of buffer instead of resistors
\end{itemize}
\bigskip
\item General structure \item General structure
\begin{itemize} \begin{itemize}
\item Removal of $g_\text{m}$ stage of Gilbert cell $\rightarrow$ more voltage headroom \item Removal of $g_\text{m}$ stage of Gilbert cell $\rightarrow$ more voltage headroom
@ -12,14 +18,6 @@
\item Differential to single-ended conversion $\rightarrow$ dense chip-to-package transition \item Differential to single-ended conversion $\rightarrow$ dense chip-to-package transition
\end{itemize} \end{itemize}
\bigskip \bigskip
\item Own simulations
\begin{itemize}
\item Better results to be expected (technology with higher $f_\text{t}$, $f_\text{max}$, stability not considered)
\item Further investigation needed to determine whether unusual LO power behavior is problematic
\item Maybe better results by using current mirrors to set operating points of buffer instead of resistors
\item Maybe better results by replacement of discrete component matching networks by transmission line based ones
\end{itemize}
\bigskip
\item Applications of this design \item Applications of this design
\begin{itemize} \begin{itemize}
\item SiGe HBT technology integrable with CMOS $\rightarrow$ scalable, suitable for mixed-signal ICs \item SiGe HBT technology integrable with CMOS $\rightarrow$ scalable, suitable for mixed-signal ICs