Commit Graph

22 Commits

Author SHA1 Message Date
0ecab2ae47 Add additional 1u bypass capacitor 2023-08-01 18:34:12 +02:00
b612cc3bcd Re-route SWD connector 2023-08-01 18:28:42 +02:00
29cd66dd2f Clean up copper keepout of matching network 2023-08-01 17:49:34 +02:00
e46114806a Add reverse polarity protection diodes; Start cleaning up top part of PCB 2023-08-01 17:38:35 +02:00
e828dc4a13 Add inductors and clean up bottom part of PCB 2023-07-31 23:34:18 +02:00
f7b4757be6 Remove one status LED and move the other one; Fix text placement of 3V3 GND 2023-07-31 21:22:53 +02:00
c4f8c0662b Increase clearance around trace running under crystal 2023-07-31 20:56:08 +02:00
519b772dfd Add SWD connector; Add text on silkscreen 2023-07-31 08:57:09 +02:00
3351a0cab8 Move around vias 2023-07-31 01:27:10 +02:00
66cc4cfc8f Position i2c and power bit headers close to other header; Add text to silk screen 2023-07-31 01:24:25 +02:00
3c2354b0f1 Add 1x2 pin headers for power and I2C 2023-07-30 23:28:25 +02:00
e4342258bd Add forgotten ground vias 2023-07-30 17:16:43 +02:00
e68695c7df Finish routing ADC in IO pins 2023-07-30 17:10:03 +02:00
485c5bf7e4 Start routing connections to pin header 2023-07-30 16:53:23 +02:00
cb4059b84a Add I2C pullup resistors to PCB 2023-07-30 16:40:15 +02:00
9c63e68db6 Add version text 2023-07-30 14:51:39 +02:00
3cae36f24b Minor cosmetic changes 2023-07-30 14:40:54 +02:00
d6d60f1417 Routed all connections 2023-07-30 14:38:13 +02:00
8ef0b56bab Fix most DRC violations 2023-07-30 09:26:25 +02:00
5f3dd6fbe4 Add missing 3d models 2023-07-30 08:55:35 +02:00
fe3a7975c5 Create first basic layout 2023-07-30 08:48:36 +02:00
3f593c47d5 Add project files and gitignore 2023-07-29 21:52:02 +02:00